This invention relates to power and signal distribution in semiconductor dies.
Many conventional semiconductors are mounted in packages such as Quad Flat Packs (QFPs) and Pin Ball Gate Arrays (PBGAs) in which the input and output terminals are arranged along the edge of the die. Arranging the terminals along the die edge may result in relatively long wirings on silicon to supply power and ground to the center of the die. These long wirings generally have a relatively high resistance leading to unacceptable IR voltage drops.
An integrated circuit power distribution system and method is provided. The integrated circuit comprises a semiconductor die that includes at least one pair of bond pads having a single bond wire connected thereto such that each bond pad of the pair of bond pads has only one bond wire end connected thereto. A first bond pad of the pair of bond pads is located in an internal portion of the semiconductor die. A first wire having a first end and a second end is electrically connected between the pair of bond pads.